This invention relates to semiconductor devices and more specifically relates to a MOSFET having an ultra low gate to drain and gate to source capacitance and thus ultra low charges QGD and QGS.
Very high speed power MOSFETs preferably have a minimized product of QG and RDSON. To accomplish this minimal value, the value of the gate to drain capacitance should be minimized. Further, it is desired to have good immunity against dv/dt conditions and, for this purpose, a small ratio of QGD/QGS is desired, to produce good Cdv/dt immunity. It is also desired to provide a minimum RDSON and a low gate poly resistance, and in the manufacturing process, a minimum number of mask steps.
In accordance with the invention, a greatly thickened oxide is disposed above the common conduction region or accumulation region between spaced bases of a vertical conduction planar power MOSFET having a cellular or striped base configuration. By increasing the spacing between the polysilicon gate and the drain surfaces over a substantial portion of their facing areas, the capacitance between the gate to the drain is substantially reduced. The ratio of QGD/QGS is also substantially reduced, producing excellent Cdv/dt immunity.